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Joined 2 years ago
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Cake day: November 8th, 2022

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  • This convo has gone on for centuries at this point. The Brain in the Jar, the teleportation conundrum, Thesius’ ship, it’s all already been covered over and over. people like you still keep crawling out of the woodwork thinking you know better than every philosopher that already waxed over this problem ad nauseum.

    Your ‘continuous self’ is just as worthless as a concept. The idea that your ‘sense of being the same person’ is being held together by being apart of your plumbing just as much of an illusion. It’s worthless.

    To elaborate, you are not the brain. You are the observer, the thing which exists as a byproduct of the brain’s processes, perhaps even a process yourself within. There’s also plenty of times when you will lose time other than sleep, like concussions, getting blackout drunk, panic attacks, and after those times you have no memory of making decisions or acting in your own accord, but you were. You, the observer, were absent while the brain kept working. So where were you?

    You act as though you’re sure you are still the same observer as the one who went to bed. That is completely unsubstantiated. You may have just been born into your body when you awoke today, and will only have until your body falls back asleep again before you cease to exist, replaced by another process that thinks itself is you, another observer.

    And if ‘you’ one day woke up in a digital world, like our own, it’s you’d be none the wiser, because your self is simply a collection of processes and memories. It’s arbitrary. It’s all dust. There’s not some special ‘continuity’ that keeps you alive somehow.
















  • I understand some instruction expansions today are used to good effect in x86, but that there are also a sizeable number of instructions that are rarely utilized by compilers and are mostly only continuing to exist for backwards compatibility. That does not really make me think “more instructions are usually better”. It makes me think “CISC ISAs are usually bloated with unused instructions”.

    My whole understanding is that while more specific instruction options do provide benefits, the use-cases of these instructions make up a small amount of code and often sacrifice single-cycle completion. The most commonly cited benefit for RISC is that RISC can complete more work (measured in ‘clockcycles per program’ over ‘clockrate’) in a shorter cyclecount, and it’s often argued that it does so at a lower energy cost.

    I imagine that RISC-V will introduce other standards in the future (hopefully after it’s finalized the ones already waiting), hopefully with thoroughly thought out instructions that will actually find regular use.

    I do see RISC-V proponents running simulated benchmarks showing RISC-V is more effective. I have not seen anything similar from x86 proponents, who usually either make general arguments, or worse , just point at the modern x86 chips that have decades of research, funding, and design behind them.

    Overall, I see alot of doubt that ISAs even matter to performance in any significant fashion, and I believe it for performance at the GHz/s level of speed.